JPH0573294B2 - - Google Patents

Info

Publication number
JPH0573294B2
JPH0573294B2 JP61262588A JP26258886A JPH0573294B2 JP H0573294 B2 JPH0573294 B2 JP H0573294B2 JP 61262588 A JP61262588 A JP 61262588A JP 26258886 A JP26258886 A JP 26258886A JP H0573294 B2 JPH0573294 B2 JP H0573294B2
Authority
JP
Japan
Prior art keywords
output
input
signal
selection
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61262588A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62114327A (ja
Inventor
Om Agrawal
Kapil Shankar
Fares N Mubarak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of JPS62114327A publication Critical patent/JPS62114327A/ja
Publication of JPH0573294B2 publication Critical patent/JPH0573294B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
JP61262588A 1985-11-05 1986-11-04 プログラム可能入力/出力セルおよびプログラム可能アレイ論理装置 Granted JPS62114327A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US795159 1985-11-05
US06/795,159 US4771285A (en) 1985-11-05 1985-11-05 Programmable logic cell with flexible clocking and flexible feedback

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP5079723A Division JP2614169B2 (ja) 1985-11-05 1993-04-06 プログラム可能アレイ論理装置およびプログラム可能論理装置

Publications (2)

Publication Number Publication Date
JPS62114327A JPS62114327A (ja) 1987-05-26
JPH0573294B2 true JPH0573294B2 (en]) 1993-10-14

Family

ID=25164856

Family Applications (2)

Application Number Title Priority Date Filing Date
JP61262588A Granted JPS62114327A (ja) 1985-11-05 1986-11-04 プログラム可能入力/出力セルおよびプログラム可能アレイ論理装置
JP5079723A Expired - Lifetime JP2614169B2 (ja) 1985-11-05 1993-04-06 プログラム可能アレイ論理装置およびプログラム可能論理装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP5079723A Expired - Lifetime JP2614169B2 (ja) 1985-11-05 1993-04-06 プログラム可能アレイ論理装置およびプログラム可能論理装置

Country Status (5)

Country Link
US (1) US4771285A (en])
EP (1) EP0225715B1 (en])
JP (2) JPS62114327A (en])
AT (1) ATE73590T1 (en])
DE (1) DE3684254D1 (en])

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JP2567463B2 (ja) * 1987-10-02 1996-12-25 川崎製鉄株式会社 プロブラマブル入出力回路
US4864161A (en) * 1988-05-05 1989-09-05 Altera Corporation Multifunction flip-flop-type circuit
US4903223A (en) * 1988-05-05 1990-02-20 Altera Corporation Programmable logic device with programmable word line connections
JP2548301B2 (ja) * 1988-05-25 1996-10-30 富士通株式会社 プログラマブル論理回路装置
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US4879481A (en) * 1988-09-02 1989-11-07 Cypress Semiconductor Corporation Dual I/O macrocell for high speed synchronous state machine
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US4967107A (en) * 1989-05-12 1990-10-30 Plus Logic, Inc. Programmable logic expander
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US5122685A (en) * 1991-03-06 1992-06-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor
US5861760A (en) 1991-04-25 1999-01-19 Altera Corporation Programmable logic device macrocell with improved capability
US5231312A (en) * 1992-03-12 1993-07-27 Atmel Corporation Integrated logic circuit with functionally flexible input/output macrocells
US5235221A (en) * 1992-04-08 1993-08-10 Micron Technology, Inc. Field programmable logic array with speed optimized architecture
US5384500A (en) * 1992-05-15 1995-01-24 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes
US5220215A (en) * 1992-05-15 1993-06-15 Micron Technology, Inc. Field programmable logic array with two or planes
US5300830A (en) * 1992-05-15 1994-04-05 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control
US5287017A (en) * 1992-05-15 1994-02-15 Micron Technology, Inc. Programmable logic device macrocell with two OR array inputs
US5331227A (en) * 1992-05-15 1994-07-19 Micron Semiconductor, Inc. Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line
US5298803A (en) * 1992-07-15 1994-03-29 Micron Semiconductor, Inc. Programmable logic device having low power microcells with selectable registered and combinatorial output signals
EP0584910B1 (en) * 1992-08-03 1996-09-04 Advanced Micro Devices, Inc. Programmable logic device
US5357153A (en) * 1993-01-28 1994-10-18 Xilinx, Inc. Macrocell with product-term cascade and improved flip flop utilization
US5473266A (en) * 1993-04-19 1995-12-05 Altera Corporation Programmable logic device having fast programmable logic array blocks and a central global interconnect array
US5440247A (en) * 1993-05-26 1995-08-08 Kaplinsky; Cecil H. Fast CMOS logic with programmable logic control
US5506517A (en) * 1993-09-01 1996-04-09 Lattice Semiconductor Corporation Output enable structure and method for a programmable logic device
US5448185A (en) * 1993-10-27 1995-09-05 Actel Corporation Programmable dedicated FPGA functional blocks for multiple wide-input functions
US5414376A (en) * 1993-12-28 1995-05-09 Micron Semiconductor, Inc. Programmable logic device macrocell having exclusive lines for feedback and external input, and a node which is selectively shared for registered output and external input
US5440246A (en) * 1994-03-22 1995-08-08 Mosel Vitelic, Incorporated Programmable circuit with fusible latch
US5689195A (en) 1995-05-17 1997-11-18 Altera Corporation Programmable logic array integrated circuit devices
US5592681A (en) * 1994-06-14 1997-01-07 Texas Instruments Incorporated Data processing with improved register bit structure
US6052773A (en) * 1995-02-10 2000-04-18 Massachusetts Institute Of Technology DPGA-coupled microprocessors
US5742180A (en) * 1995-02-10 1998-04-21 Massachusetts Institute Of Technology Dynamically programmable gate array with multiple contexts
GB2300946B (en) * 1995-05-17 1999-10-20 Altera Corp Tri-statable input/output circuitry for programmable logic
US5521529A (en) * 1995-06-02 1996-05-28 Advanced Micro Devices, Inc. Very high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocation
US5818254A (en) * 1995-06-02 1998-10-06 Advanced Micro Devices, Inc. Multi-tiered hierarchical high speed switch matrix structure for very high-density complex programmable logic devices
US6028446A (en) * 1995-06-06 2000-02-22 Advanced Micro Devices, Inc. Flexible synchronous and asynchronous circuits for a very high density programmable logic device
US5651013A (en) * 1995-11-14 1997-07-22 International Business Machines Corporation Programmable circuits for test and operation of programmable gate arrays
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US5943488A (en) * 1996-06-26 1999-08-24 Cypress Semiconductor Corp. Method and apparatus to generate mask programmable device
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US6150837A (en) * 1997-02-28 2000-11-21 Actel Corporation Enhanced field programmable gate array
US5889414A (en) * 1997-04-28 1999-03-30 Mosel Vitelic Corporation Programmable circuits
US5952852A (en) * 1997-07-02 1999-09-14 Actel Corporation Fast wide decode in an FPGA using probe circuit
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US6020760A (en) 1997-07-16 2000-02-01 Altera Corporation I/O buffer circuit with pin multiplexing
US6034857A (en) 1997-07-16 2000-03-07 Altera Corporation Input/output buffer with overcurrent protection circuit
US6130555A (en) * 1997-10-13 2000-10-10 Altera Corporation Driver circuitry for programmable logic devices
US6385735B1 (en) * 1997-12-15 2002-05-07 Intel Corporation Method and apparatus for limiting processor clock frequency
US6084803A (en) * 1998-10-23 2000-07-04 Mosel Vitelic, Inc. Initialization of non-volatile programmable latches in circuits in which an initialization operation is performed
US6163492A (en) 1998-10-23 2000-12-19 Mosel Vitelic, Inc. Programmable latches that include non-volatile programmable elements
US6161188A (en) * 1998-11-17 2000-12-12 Ip-First, L.L.C. Microprocessor having fuse control and selection of clock multiplier
US6191612B1 (en) 1998-11-19 2001-02-20 Vantis Corporation Enhanced I/O control flexibility for generating control signals
JP4206203B2 (ja) * 1999-03-04 2009-01-07 アルテラ コーポレイション プログラマブルロジック集積回路デバイスの相互接続ならびに入力/出力リソース
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US7292069B2 (en) * 2005-12-30 2007-11-06 Intel Corporation Locally asynchronous, block-level synchronous, configurable logic blocks with sub-threshold analog circuits
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US7893772B1 (en) 2007-12-03 2011-02-22 Cypress Semiconductor Corporation System and method of loading a programmable counter
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Also Published As

Publication number Publication date
ATE73590T1 (de) 1992-03-15
EP0225715A3 (en) 1988-12-14
US4771285A (en) 1988-09-13
DE3684254D1 (de) 1992-04-16
JP2614169B2 (ja) 1997-05-28
EP0225715A2 (en) 1987-06-16
JPH06140919A (ja) 1994-05-20
JPS62114327A (ja) 1987-05-26
EP0225715B1 (en) 1992-03-11

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